3.1 Write the number 229 in base 2.
3.2 What is the base-10 value of 11100101?
3.3 What are the units (values) of the first 3 columns in a base-8 (octal) number?
3.4 What is the base-2 value of the base-8 (octal) number 377?
3.5 Convert the following base-10 numbers to base 2:
37
470
1220
17
99
3.6 Convert the following base-2 numbers to base 10:
00000111
10101010
00111001
01010101
00110011
3.7 Assume a 16-bit signed integer data representation where the sign bit is the msb.
a What is the largest positive number that can be represented?
b Write the number 17,440.
c Write the number −20.
d What is the largest negative number that can be represented?
3.8 Using ASCII encoding, write the bytes to encode your initials in capital letters. Follow each letter with a period.
3.9 Referring to the list of Intel x86 instructions in this chapter, arrange a set of instructions to add the values
stored in memory locations 50 and 51, and then to store the result in memory location 101. You need not
show the bit pattern for each instruction; just use the mnemonics listed, followed in each case by the
appropriate operand(s).
3.10 What Intel x86 instructions would you use to accomplish subtraction using 2’s complement addition?
This instruction set has a SUB instruction, but don’t use that; write your own 2’s complement routine
instead.
3.11 What are the advantages of a larger computer word size? Are there disadvantages? If so, what are the
disadvantages?
3.12 Assume that cache memory has an access time of 10 nanoseconds, while main memory has an access
time of 100 nanoseconds. If the “hit rate” of the cache is .70 (i.e., 70 percent of the time, the value
needed is already in the cache), what is the average access time to memory?
3.13 Assume our 1 GHz computer, which averages 3 cycles per instruction, is connected to the Internet via
a 10 Mbit connection (i.e., the line speed allows 10 million bits to pass every second). From the time
the computer receives the first bit, how many instructions can the computer execute while waiting for
a single 8-bit character to arrive?
3.14 What complexity does DMA present to the management of cache memory?
3.15 Discuss the concept of a “memory hierarchy” whereby memory closer to the CPU is faster, more
expensive, and smaller than memory at the next level. Arrange the different types of memory we have
discussed in such a hierarchy.
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